CJMCU-2232 FT2232HL USB to UART/FIFO/SPI/I2C/JTAG/RS232 Module External Memory J2

The CJMCU-2232HL FT2232H is FTDI's fifth-generation USB device chip. The FT2232H is a USB 2.0 High-Speed (480 Mbit/s) to UART/FIFO interface. It is capable of operating in a variety of industry-standard serial or parallel interface configurations. Building on the innovative features of the FT2232, the FT2232H features two Multi-Protocol Synchronous Serial Engines (MPSSEs), allowing simultaneous communication using JTAG, I2C, and SPI channels. A 512-byte receive buffer and a 512-byte transmit buffer utilize buffering techniques for high data throughput. Battery charger detection allows mobile devices to detect the presence of a charger on the USB port, enabling higher current/faster battery charging. Low operating current of 8 mA (typical) and USB suspend current of 125 µA (typical). Low USB bandwidth consumption. FTDI's royalty-free Virtual COM Port (VCP) and Direct (D2XX) drivers eliminate the need for USB driver development in most cases. Module USB supply voltage: DC5V; USB 2.0 full-speed compatible. Built-in 3.3V/1.8V LD0 regulator. Extended operating temperature range: -40℃ to 85℃ 20-pin SSOP and QFN packages (RoHS compliant). Compatible with UHCI/OHCI/EHCI host controllers. Integrated power-on-reset circuit. Data transfer rate: 1 megabyte per second. Each chip has a pre-programmed unique USB serial number. Supports bus-powered, self-powered, and high-power bus-powered USB configurations. Built-in +3.3V level shifter for USB I/O. True 3.3V CMOS driver outputs and TTL inputs (operates down to 1.8V with external pull-up resistors). I/O voltage levels from 1.8V to 3.3V (tolerant to 5V). Configurable I/O pin drive current. The entire USB protocol is handled on this chip, requiring no USB-specific firmware programming. The FT1248 serial-to-parallel interface operates in 1-, 2-, 4-, or 8-bit modes, similar to SPI slave 1-bit mode. Integrated 2048 bytes of multi-time programmable (MTP) memory for storing device descriptions and CBUS I/O configurations. An integr